Field Programmable Gate Array (FPGA) is a semiconductor device that can be programmed to realize basic logic functions like AND, XOR etc or some complex combinational and sequential functions. It consists of a matrix of reconfigurable gate array logic circuitry. When a FPGA is configured, the internal circuitry is connected in a way that creates a hardware implementation of the software application. Unlike processors, FPGAs use dedicated hardware for processing logic and do not have an operating system. FPGAs are truly parallel in nature so different processing operations do not have to compete for the same resources. As a result, the performance of one part of the application is not affected when additional processing is added. Also, multiple control loops can run on a single FPGA device at different rates. FPGA-based systems can enforce critical interlock logic and can be designed to prevent I/O forcing by an operator. However, unlike hard-wired printed circuit board (PCB) designs which have fixed hardware resources, FPGA-based systems can literally rewire their internal circuitry to allow reconfiguration after the system is deployed to the field. FPGA devices deliver the performance and reliability of dedicated hardware circuitry.
A single FPGA can replace thousands of discrete components by incorporating millions of logic gates in a single integrated circuit (IC) chip. FPGA technology provides the reliability of dedicated hardware circuitry, true parallel execution and lightning fast closed loop control performance.
The historical roots of FPGAs are in complex programmable logic devices (CPLDs) of the early to mid 1980s. A Xilinx co-founder invented the field programmable gate array in 1984. CPLDs and FPGAs include a relatively large number of programmable logic elements. CPLD logic gate densities range from the equivalent of several thousand to tens of thousands of logic gates, while FPGAs typically range from tens of thousands to several million.
The popularity of FPGAs and CPLDs over other programmable logic devices like Programmable Logic Array (PLA) and Programmable Array Logic (PAL) is because of the size of complex functions that can be put in single FPGA. With the complexity of digital systems, PALs and PLAs become too small to satisfy the designers? needs.
Based on different process technologies, FPGA may be of following types:
i). SRAM: This is based on static memory technology. SRAM-based FPGAs are the most popular FPGAs in present world market. The design is relatively simple; it is In-system programmable and re-programmable.? Its major disadvantage is that it requires external boot devices and it has to be reconfigured each time power is turned on.
ii). Antifuse: Antifuse refers to a programmable chip technology that creates permanent, conductive paths between transistors. In contrast to "blowing fuses" in the fusible link method, which opens a circuit by breaking apart a conductive path, the antifuse method closes the circuit by "growing" a conductive path. Two metal layers sandwich a layer of non-conductive, amorphous silicon. When voltage is applied to this middle layer, the amorphous silicon is turned into polysilicon, which is conductive.? This is one time programmable technology but retains configuration after power off.
iii). EPROM: Erasable Programmable Read-Only Memory technology. Usually, they are one-time programmable in production because of plastic packaging. Windowed devices can be erased with ultraviolet (UV) light.
iv). EEPROM: Electrically Erasable Programmable Read-Only Memory technology. They can be erased, even in plastic packages. Some, but not all, EEPROM devices can be in-system programmed.?
vi). Flash: ?This type of FPGAs are based on Flash-erase EPROM technology. They can be erased, even in plastic packages. Some, but not all, flash devices can be in-system programmed. Usually, a flash cell is smaller than an equivalent EEPROM cell and is therefore less expensive to manufacture.
First of all any digital system must be visualized and the digital hardware of that system can be worked out. Then the hardware can be described in hardware description language (HDL) or a schematic design. Common HDLs are VHDL and Verilog. Then, using an electronic design automation tool, a technology-mapped netlist is generated. The netlist can then be fitted to the actual FPGA architecture using a process called place-and-route, usually performed by the FPGA Company?s proprietary place-and-route software. The user will validate the map, place and route results via timing analysis, simulation, and other verification methodologies. Once the design and validation process is complete, the binary file generated (also using the FPGA company's proprietary software) is used to (re)configure the FPGA.
In an attempt to reduce the complexity of designing in HDLs, which have been compared to the equivalent of assembly languages, there are moves to raise the abstraction level of the design. Companies such as Cadence, Synopsys and Celoxica are promoting SystemC as a way to combine high level languages with concurrency models to allow faster design cycles for FPGAs than is possible using traditional HDLs.
?The primary differences between CPLDs and FPGAs are architectural. A CPLD has a somewhat restrictive structure consisting of one or more programmable sum-of-products logic arrays feeding a relatively small number of clocked registers. The result of this is less flexibility, with the advantage of more predictable timing delays and a higher logic-to-interconnect ratio. The FPGA architectures, on the other hand, are dominated by interconnect. This makes them far more flexible (in terms of the range of designs that are practical for implementation within them) but also far more complex to design for.
Some FPGAs have the capability of partial re-configuration that lets one portion of the device be re-programmed while other portions continue running.
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